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Evaluation Board User Guide
EVALUATION BOARD HARDWARE
The evaluation board comes with a cable to connect to the USB
port of a PC. The silkscreen for the evaluation board is shown
in Figure 2. The board schematics are shown in Figure 11,
Figure 12, and Figure 13.
UG-105
RF OUTPUT STAGE
The RF output stage of the board allows the user to insert a
tuned load for a particular frequency. The particular network
inserted in the board is optimized for 120 MHz operation. For
different frequencies, the output stage needs different component
values. Consult the ADF4360-8 data sheet for further information.
If in doubt, use a 50 Ω resistor instead of the shunt inductor and
a 100 pF bypass capacitor and a 0 Ω resistor instead of the series
inductor.
It is important that the same components be placed on the RF OUT A
and RF OUT B lines. In addition, it is essential that both outputs be
terminated with 50 Ω loads. Otherwise, the output power is not
optimal, and, in some cases, the part may malfunction.
In applications that only use the divider, both RF outputs are
best terminated with a shunt 50 Ω resistor to AV DD , a series
100 pF dc bypass capacitor, and a 50 Ω load to GND.
EXTERNAL INDUCTOR OPTIONS
The ADF4360-8 uses external inductors (L1 and L2) to set up the
LC tank circuit of the VCO. The evaluation board has a footprint
for the placement of these. A value of 220 nH is inserted on the
board giving a VCO center frequency of 120 MHz. Insert two
470 Ω resistors (R25 and R26) parallel to ground for both L1 and L2
(see Figure 3).
Figure 2. Evaluation Board Silkscreen—Top View
The board is powered from a single 9 V battery or from the USB
supply by changing the position of Switch SW1. All components
necessary for LO generation are catered for on board. A 10 MHz
TCXO from Fox Electronics provides the necessary reference
input. Otherwise, an external reference signal can be connected
via J3. The PLL comprises the ADF4360-8BCPZ and a passive
loop filter. The VCO output from RF OUT A is available through
the standard SMA connector, J1, and the complementary RF OUT B
VCO output is available from J2.
Users can provide their own power supplies using the J4 and J5
connectors, as shown in Figure 2. Hardware power-down using
the CE pin can be controlled by inserting an SMA connector
into J6 and removing R12.
The on-board filter is a third-order, passive, low-pass filter. The
filter contains three capacitors (C13, C14, and C15) plus two
resistors (R10 and R11). The footprint for R10 is located on the
underside of the board. The design parameters for the loop
filter are for a center frequency of 120 MHz, a PFD frequency of
1 MHz, and a low-pass filter bandwidth of 40 kHz. To design a
filter for different frequency setups, use the ADIsimPLL simulation
software.
Figure 3. External Inductors and Resistors for the ADF4360-8 Tank Circuit
Rev. B | Page 3 of 16
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